1. Field of the Invention
The present invention relates to a nonvolatile memory device such as an electrical erasable and programable read only memory (EEPROM), and more particularly, to a nonvolatile memory device with compensation for an over-erasing operation.
2. Description of the Related Art
Generally, an EEPROM cell includes a P-type semiconductor substrate having an N.sup.+ -type source region and an N.sup.+ -type drain region, a floating gate via an insulating layer on the semiconductor substrate between the source region and the drain region, and a control gate via another insulating layer on the floating gate. In a write mode, a high positive voltage is applied to the drain region and another high positive voltage is applied to the control gate while the source region is grounded. As a result, hot electrons having an energy larger than an energy barrier of the insulating layer between the floating gate and the semiconductor substrate are introduced into the floating gate, thus completing a writing operation. In this case, the threshold voltage of the EEPROM cell is made higher. On the other hand, in an erase mode, a high positive voltage is applied to the drain region and the control gate is grounded. As a result, the electrons stored in the floating gate are extracted thereform to the drain region utilizing the Fowler-Nordheim tunneling effect. To realize the Fowler-Nordheim tunneling effect, the insulating layers are made very thin.
In the above-mentioned erase mode, however, when more electrons than those introduced in a write mode are extracted from the floating gate, the threshold voltage of the EEPROM cell may be made negative, i.e., the EEPROM cell becomes a depletion type transistor. Such an erasing operation is called an over-erasing operation.
In order to compensate for such an over-erasing operation, there has been known an EEPROM cell having a selection gate (see: K. Naruke et al.: "A NEW FLASH-ERASE EEPROM CELL WITH SIDEWALL SELECT-GATE ON ITS SOURCE SIDE", IDEM Tech. Digest, 1989, pp. 603-606). This prior art EEPROM cell is, however, disadvantageous in terms of integration and characteristics, which will be explained later in detail.